Wafer scale processing of semiconductor materials or laminates which include semiconductor material require singulation of discrete components or chips or dies by saw separation of the wafer. The chips are demarcated by scribe lines in the form of alleys which contain no circuitry or bond pads, where mechanical separation by sawing can be performed without damage to the circuitry on the dies. There are many challenges and risks associated with saw separation of device dies from wafers, including fragility of the dies and the need for cooling water, de-ionization agents, debris contamination and the possibility of partial or total damage of the wafer. Therefore, careful process control of saw scribe separation is required. Improvements to automated wafer singulation saw equipment has helped in these respects, as described for example in U.S. Pat. Nos. 5,059,899; 6,150,240 and 6,568,384, but have not adequately addressed all of these factors and the special challenges presented by laminated wafer dies.
Scaled production of laminated devices, such as glass-on-silicon and glass-on-glass as used for example in liquid-crystal-on-silicon (LCoS) and reflective LCoS devices, requires clean saw separation of all of the layers of the laminate. Differences in material properties of the layers can result in rough or flared edges in one or more layers of the laminate. Non-square edges cause problems when aligning these types of devices with one another or to other mechanical edges. It would be desirable for the singulation process to result in separate laminate dies with optimally smooth edges for subsequent processing.